Sunday March 5, 2023

There will be breaks including refreshments to provide networking time for Tutorial attendees.

Please note: attendance at the tutorial will be limited. Please sign-up early to not miss out!

1:00 to 3:00 pm

Tutorial

Optional Tutorial

“mm Waves vs. Test Sockets”

Gert Hohenwarter

GateWave Northern, Inc.

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Gert Hohenwarter
GateWave Northern, Inc.

The mm Waves vs. Test Sockets tutorial will cover aspects of test socket design and implementation for millimeter wave applications. It will first look at basic millimeter wave propagation and examine the drivers and motivation for using such high frequencies. It will then identify some of the impact on socket vendors by examining design fundamentals.

Among those are pitch, material selections, PCB routing, parasitics and lateral features configuration.Furthermore, requirements for socket design simulations will be detailed. Finally, performance verification requirements for measurements will be addressed as will be an outlook for future developments in these areas.

Gert Hohenwarter’s area of expertise is characterizing test sockets and interconnects for the ATE industry. Additionally he optimizes high speed interfaces and PCB layouts for best performance.

Gert has a Ph.D. from the University of Wisconsin, Madison and a Diplom - Ingenieur degree in Elektrotechnik from the Technical University of Braunschweig in Germany. He is a member of the scientific research society Sigma Xi.

3:00 pm

Networking Break

3:30 to 5:30 pm

Tutorial

Optional Tutorial

“An Integrated Approach to Testing Analog Sub-systems in Large Digital "Cheap" SoCs”

Thecla Chomicz

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Thecla Chomicz
NXP

Testing large analog subsystems within even larger digital SoCs requires an integrated approach from system definition day one. This presentation will identify how to align the overall test strategy to various expectations of test across disciplines and test environments.

These expectations include testing for manufacturing anomalies, validating against industry specifications and the ability to debug issues. Once the various test expectations are defined, the analog sub-system is analyzed to expose critical components needed for test access during probe, stress testing, final test, bench testing, failure analysis and in-application observation. Lastly, a method that allows for quick turn test development targeting a number of different environments including simulation, production test and bench top testing will be discussed.

Thecla Chomicz has been working in the Semiconductor Industry for over 30 years. She started in Motorola’s Engineering Rotation Program and over the course of her career she has designed individual analog circuits, developed semi-custom analog products, team lead the integration of analog blocks into SoCs and architected and validated high speed serial interfaces for NXP’s Digital Networking QorIQ family of network processors and NXP’s Layerscape DataPath Packet Processing Accelerators. Currently she is working on integrating and validating high speed serial interfaces into Automotive processors. Thecla has a Bachelor of Science in Electrical Engineering from the University of Michigan and a Master’s Degree from the Rochester Institute of Technology.

5:30 p

Welcome Reception

If this is your twenty-fourth time attending TestConX, only your first, or somewhere in-between you will feel welcomed at the opening reception by friends old and new.

6:30 p

Dinner

The first of many excellent meals awaits as you get to network with other industry professionals. This is a great time to catch up with old colleagues or start meeting new friends.