Burn-in & Test Socket WorkshopTM


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BiTS is the world's premier workshop dedicated to providing a forum for the latest information about burn-in and test socketing, and related fields.
At BiTS you'll find a comprehensive technical program, exhibits of the latest products and services, and many opportunities to meet, network and explore ideas with other test and burn-in socketing professionals.

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The papers in this publication comprise the proceedings of the 2005 BiTS Workshop. They reflect the authors’ opinions and are reproduced as presented , without change. Their inclusion in this publication does not constitute an endorsement by the BiTS Workshop, the sponsors, BiTS Workshop LLC, or the authors.

There is NO copyright protection claimed by this publication or the authors. However, each presentation is the work of the authors and their respective companies: as such, it is strongly suggested that any use reflect proper acknowledgement to the appropriate source. Any questions regarding the use of any materials presented should be directed to the author/s or their companies.

All photographs on this page are copyrighted by BiTS Workshop LLC. The BiTS logo and ‘Burn-in & Test Socket Workshop’ are trademarks of BiTS Workshop LLC.


BiTS is the world’s premier workshop dedicated to providing a forum for the latest information about burn-in and test socketing, and related fields. At BiTS you’ll find a comprehensive technical program, exhibits of the latest products and services, and many opportunities to meet, network and explore ideas with other test and burn-in socketing professionals.

Technical Program

More than 25 papers addressing important topics in socketing and related areas were presented. Our panel discussion brought together a distinguished group of experts who shared their thoughts and took questions on a challenging subject of current interest. In the keynote address, Eric Tosaya of AMD spoke on the topic of microprocessor packaging trends.

BiTS 2005 Expo

45 exhibitors, from socketing and related industries, exhibited their products during breaks in the technical program.

Click HERE for a directory of exhibitors.

BiTS 2005 Attendees

BiTS Workshop 2005 brought together over 325 attendees and 45 exhibitors from around the world representing end users and suppliers of sockets, boards, burn-in systems, handlers, packages and other related equipment, materials and services.

BiTS 2005 in the Press

BiTS 2005 Organizing Committee

Paul Boyce (Advantage Specialist), Owen Prillaman (Yamaichi), Mark Murdza (Wells-CTI), Fred Taber (IBM), Valts Treibergs (ECT), Mike Noel (Freescale), John Ambrosini (Enplas-Tesco), Steve Hamren (Micron), Marc Knox (IBM). Not pictured: Rafiq Hussain (AMD), Tim Swettlen (Intel)



Introducing…BiTS Tutorial

BiTS is pleased to announce that world renowned high frequency expert Eric Bogatin presented a special half- day tutorial. 

“Signal Integrity and Test Sockets- simplified”

The electrical properties of sockets have always been important, but never more so as application bandwidths exceed 2 GHz for RF and high speed digital devices.  Yet, there are many aspects of socket characterization, analysis and design, which are confusing and sometimes, even misleading. In this tutorial, Eric will dispel some of the myths and misconceptions on this topic and review the basics of what a socket designer or user needs to know to evaluate a test socket for high-speed applications.

The Tutorial handout slides can be downloaded below:

bits2005_tutorial_bogatin.pdf pdficonsmall.gif (153 bytes) ( 1.25 MB)


Welcome and Wrap-Up to BiTS 2005

Fred Taber, IBM, BiTS General Chairman's Opening 7 Closing Remarks

2005_welcome_wrapup.pdf pdficonsmall.gif (153 bytes) (168 KB)



Topic:  "Thermal Issues Related to Devices of Today and Tomorrow, What Can We Expect Moving Forward?"

Preface:  A panel comprised of end user and supplier representatives discussed challenges and possible solutions to achieve thermal control of devices in burn-in and test. Several factors make this a critical topic in today's environment:

  • Market demand for higher power devices

  • Smaller devices and increased functionality

  • Shrinking device feature size contributing to thermal differences from chip to chip on a wafer

  • Thermal management to achieve effective/accurate test and burn-in

Panel Members:

Moderator Frederick Taber IBM Microelectronics (ret)
Panelist  Chris Lopez Wells-CTI
Panelist  Dave Gardell IBM Microelectronics
Panelist  Ken Heiman Micro Control Company Slide
Panelist  Mike Noel Freescale
Panelist  Steve Steps AEHR Test Systems Slide
Panelist  Mike Ramsay Plastronics Slide
Panelist  Jim Rhodes Unisys Slide

2005_panel.pdf pdficonsmall.gif (153 bytes) (463 KB)

Today’s demanding conditions make achieving and maintaining good contact a challenge. This opening session's presenters discuss their work on materials, lead-free and cleaning to overcome contacting hurdles.

Enhanced High Strength/High Conductivity Copper-Beryllium Strip For Demanding BiTS Applications John Harkness, Brush Wellman
Challenges Of Contacting Lead-Free Devices
Brian Sheposh, Johnstech
Application Of Socket Cleaning And Contact Restoration To Reduce Burn-In, Test And Device Programming Cost
Erik Orwoll, Nu Signal
Jason Hughes, IBM Microelectronics

2005s1.pdf pdficonsmall.gif (153 bytes) (1.53 MB)


Technical requirements and cost reduction are driving this session’s speakers to introduce novel ideas in socket design. You’ll hear about recent work on Kelvin sockets and socket standardization that led to successful introduction to manufacturing.

Development Of A Production Worthy Kelvin Contact Test Socket Fred Megna, MJC
Valen Burd, Microchip
"Topless Burn-In Socket" a Customer's Socket Standardization (Follow-Up To The Key Notes Speaker 2004) Holger Hoppe, Infineon
The Case For A Universal Socket Footprint John Mendes, IBM Microelectronics

2005s2.pdf pdficonsmall.gif (153 bytes) (6.84 MB)


Always a popular topic at BiTS, this year’s session on Printed Circuit Boards addresses several prominent and increasingly complex considerations and requirements faced by the board designer and manufacturer, such as fine pitch, high power and signal integrity.

ATE And DUT Socket Demands On PCB Transmission Lines Zaven Tashjian, Circuit Spectrum
Martin Mullaney, Circuit Spectrum
Trace/Grid Power Plane Design For Fine Pitch Printed Circuit Board Anthony Wong, Intel
Cher-Shyong Low, Intel
Leakage As Filaments and Dendrites Form In PWB S. Kumaran, TrioTech
Challenges In High Current PCB Power Delivery Hon Lee Kon, Intel
Anthony Wong, Intel

2005s3.pdf pdficonsmall.gif (153 bytes) (3.67 MB)


Higher bandwidth devices require more focus on the socket’s electrical characteristics. Our presenters cover common metrics and tools utilized to improve electrical performance, plus share some measurement and modeling case studies.

Practical Techniques Of Measuring High Bandwidth Electrical Models Of Test Sockets Eric Bogatin, Synergetix
Kevin DeFord, Synergetix
Meena Nagappan, Synergetix
3D AC Simulation of Inter-Connector Frank Zhou, Kulicke & Soffa
Uyen Nguyen, Kulicke & Soffa
High Frequency Signal Integrity Issues In Semiconductor Test Ryan Satrom, Everett Charles Technologies
Jason Mroczkowski, Everett Charles Technologies

2005s4.pdf pdficonsmall.gif (153 bytes) (1.37 MB)


This topic has always been one of the most popular at BiTS and this year should be no exception. With discussions relevant to today’s high stakes decisions, hear about the quantitative and qualitative processes followed by our speakers from the user and supplier communities.

Qualifying A Supplier, What One Customer Does… Tim Swettlen, Intel
Brett Grossman, Intel
Marc Berube, Intel
Reducing Cost Of Test: High Speed Contactor Systems Gordon Vinther, Ardent Concepts
Tom Goss, M/A Com / Tyco Electronics
Verification Of The Predictive Capability Of A New Stress Relaxation Test Apparatus And FEA Technique For Predicting The Stress Relaxation Of Electro-Mechanical Spring Contacts Made Using CuBe Strip Michael Gedeon, Brush Wellman
Hideo Matsushima, Brush Wellman

(Presented by Jim Johnson, Brush Wellman)

2005s5.pdf pdficonsmall.gif (153 bytes) (3.13 MB)


This session’s presenters take us through innovative approaches, techniques and methodologies to achieve lower cost, improve manufacturing operations/processes and effectively handle the massive amounts of data produced by the manufacturing process.

The Trouble With Carriers Jay Stutzman, Micron
Dan Cram, Micron
Innovations For Reducing Burn-In Costs For Known Good Die Steve Steps, AEHR
Burn-In Time Acceleration by Better temperature and Voltage Control James Babcock, Unisys
Larry Friedrich, Unisys

(Presented by Steve Smiley, Unisys)

Approaches And Methodologies For High Resolution Burn-In And Test Data Management Tamas Kerekes, N plus T

2005s6.pdf pdficonsmall.gif (153 bytes) (8.15 MB)


Hot Topics Session - CONTROLLING ESD
Still have those ESD issues that surfaced at BiTS 2004? Well, we’ve arranged for a special bonus session on this hot topic.  You’ll learn about an ESD controlled socket and new materials to control ESD.

Methods of Preventing ESD in Module Testing Zenon Podpora, IBM Microelectronics
Qifang Qiao, IBM Microelectronics
Patrick Rafter, IBM Microelectronics
New ESD Control Polymers Naomitsu Nishihata, Kureha

2005ht.pdf pdficonsmall.gif (153 bytes) (489 kB)




Eric Tosaya - Advanced Micro Devices

A review of packaging trends for microprocessors was presented that will covered the types of packaging used by major suppliers for different market segments such as server, desktop, mobile, handheld, etc. The various key driving forces for the types of packages selected for each market segment was summarized. Then the processor backend of line (BEOL) manufacturing flow was presented and the manufacturing and technical challenges presented by the various BEOL test operations was discussed.

2005_keynote.pdf pdficonsmall.gif (153 bytes) (609 kB)


Temperature control during test and burn-in is a common but critical requirement, yet achieving it is complex.  Our three presenters took away some of the mystery by sharing their thermal management methods and techniques for devices across a wide power range.

Thermal Characterization and Specification For Test And Burn In
Dave Gardell, IBM Microelectronics
A Cost Effective, Flexible Approach To Automated Thermal Control During Burn-In Chris Lopez, Wells-CTI
Brian Denheyer, Wells-CTI
Mike Noel, Freescale
Don VanOverloop, Freescale
Highly Efficient Passive Heatsinks For 5-20 Watt Applications Natarajan "Ram" Ramanan, Ph.D., P.E., Applied Thermal Technologies
Mike Ramsey,  Plastronics

2005s7.pdf pdficonsmall.gif (153 bytes) (2.02 MB)


As pitch gets ever tighter, there are smaller tolerances available to successfully socket a device. Key issues of alignment and contact type/size/
shape/characteristics, along with proposed solutions, are covered by this session’s three presenters.

Challenges In Contactor Alignment For Fine Featured Packages Jon Diller, Synergetix
Kiley Beard, Synergetix
Ron Meek, Synergetix
Socketing The Unsocketable: Comparing Geometric Tolerances Of Semiconductor Devices To Burn-In and Test Sockets Thomas Allsup, Anida
A Review Of Contacting Systems For Burn-In Sockets At Pitches Of 0.5 mm And Below James Forster, Texas Instruments
Prasanth Ambady, Texas Instruments

2005s8.pdf pdficonsmall.gif (153 bytes) (2.99 MB)

The topic is high current characterization - a 'hot' topic from BiTS 2004! 

Characterization of Maximum Current Capability for Microprocessor Sockets

David Song, Intel
Ashish Gupta, Intel
Chia-Pin Chiu, Intel

2005s.pdf pdficonsmall.gif (153 bytes) (580 KB)


Page last modified 12/23/09

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