Burn-in & Test Socket WorkshopTM


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BiTS is the world's premier workshop dedicated to providing a forum for the latest information about burn-in and test socketing, and related fields.
At BiTS you'll find a comprehensive technical program, exhibits of the latest products and services, and many opportunities to meet, network and explore ideas with other test and burn-in socketing professionals.

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The papers in this publication comprise the proceedings of the 2007 BiTS Workshop. They reflect the authors’ opinions and are reproduced as presented , without change. Their inclusion in this publication does not constitute an endorsement by the BiTS Workshop, the sponsors, BiTS Workshop LLC, or the authors.

There is NO copyright protection claimed by this publication or the authors. However, each presentation is the work of the authors and their respective companies: as such, it is strongly suggested that any use reflect proper acknowledgement to the appropriate source. Any questions regarding the use of any materials presented should be directed to the author/s or their companies.

All photographs on this page are copyrighted by BiTS Workshop LLC. The BiTS logo and ‘Burn-in & Test Socket Workshop’ are trademarks of BiTS Workshop LLC.

Technical Program

More than 25 presentations addressing important topics in socketing and related areas were delivered by authors from the user and supplier communities.

Two Tutorials were offered where you can learn from experts to build your leading edge skills.

A respected Invited Speaker shared his views on the socket industry from a unique perspective.

In the keynote address, a renowned industry leader spoke on a key topic sure to stimulate thoughts and ideas.

BiTS EXPO 2007
58 exhibitors, from socketing and related industries, exhibited their products and services during breaks in the technical program.  Click HERE for more info.

BiTS 2007 brought together 360 full-conference attendees and 58 exhibitors from around the world, representing end users and suppliers of sockets, boards, burn-in systems, handlers, packages and other related equipment, materials and services.

BiTS 2007 in the Press

BiTS 2007 Organizing Committee

Rafiq Hussain (AMD), Fred Taber (BiTS Workshop), Mike Noel (Freescale), Marc Knox (IBM), Steve Hamren (Micron Technology), Owen Prillaman (Yamaichi Electronics), Valts Treibergs (Everett Charles Technologies),  Mark Murdza (Antares Advanced Test Technologies), Not pictured: Paul Boyce (Advantage Specialist), John Ambrosini (Enplas -Tesco), John Moore (Texas Instruments)



Tutorial 1

ATE Printed Circuit Board Design; Performance vs. Design for Manufacturability vs. Time to Test

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Steve Arobio
Chief Operating Officer
Dynamic Test Solutions

Current printed circuit board design requirements have challenged the manufacturing processes to new limits. In the ATE industry in particular, test performance, signal speeds, multi-site device testing and shortened time to test demands have pushed the PCB Industry to more layers, tighter pitch, higher aspect ratios, exotic materials and customized processes. At times, the consequences have been poor yields, extensive test floor trouble-shooting, longer lead times and higher costs. This tutorial will address several of the performance drivers, along with the possible trade-offs associated with each of them, to give the Test Engineer a choice.

Tutorial 2

An Overview of Critical Issues in IC Packaging

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Charles Cohn
Senior Analyst
TechSearch International

Semiconductor packaging has become increasingly critical as the package becomes the limiting factor in integrated circuit (IC) performance. This tutorial provides insight into the important aspects of these critical packaging issues. Topics include an overview of the IC packages used in volume production, trends in IC packages such as body size, pin count, and package pitch. Materials and test issues will also be addressed.


Invited Speaker

From the Frying Pan Into the Fire; Working on Both Sides of the Tooling Supply Chain

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Steven B. Strauss
VP of Engineering
Antares Advanced Test Technologies

For many years I was the consumer of test technology and test tooling at Intel Corporation. In the last year I have jumped from the 'frying pan into the fire'. Now I am the VP of Engineering at Antares Advanced Test Technologies. My responsibilities in this new role include supplying the test tooling needs for many customers.

This experience in the role of supplier has been a learning experience. Having spent time in both roles I can compare and contrast the challenges of both supplier and customer. My intent in this presentation is to highlight the issues and challenges that occur when suppliers have to respond to the demands of customers.

At the root of these issues are always the assumptions that are made by the customers with respect to the capabilities of suppliers and vice versa. Differences are abound in technology, measurement, supplier management, effectiveness of customer specifications, mid-stream design and requirements changes and risks that can be assumed as well as political considerations for all parts of the supply chain.

 Mr. Strauss is the Vice President of Engineering at Antares Advanced Test Technologies. Prior to joining Antares, he held the position of Intel's Test Tooling Operation Manager, where he was responsible for enabling and providing test tooling collaterals to design, development and high volume factories. Mr. Strauss delivered the Keynote Address at the 2002 BiTS Workshop.

Covering the Latest Information on Important Topics in Socketing and Related Areas



Opening Remarks

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Welcoming remarks from the General Chair

BiTS 2007 Keynote
The Impact of New Applications and Increasing Device Complexity on the Future of Testing

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Mr. Appleton is Chairman of the Board, Chief Executive Officer and President of Micron Technology, Inc. He joined Micron in 1983 and has held a series of increasingly responsible positions, including Production Manager, Director of Manufacturing and Vice President of Manufacturing. In 1994, Mr. Appleton was appointed to his current position of Chairman, Chief Executive Officer and President.

Steven R. Appleton
Chairman, CEO and President, Micron Technology
The emergence of consumer applications, coupled with advances in highly integrated packages, has significantly changed both the economic equation and the technical challenges for testing new complex devices.

The wide variety of applications requiring various levels of quality and reliability, combined with their vastly different product life cycles, also poses a need to rethink the industry's historical perspective of "one size fits all".

We will explore these topics in light of current market trends and their impact on test costs and strategies moving forward.


Session 1

  Designing for Socket Electrical Integrity

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Electrical limitations of test hardware can be found in almost any family of products. Whether it's high speed, low power memory DUT's, ultra fast wireless DUT's, or high power processors, the need to create mechanically and electrically predictable interfaces demand more from today's socket designer. This session will delve into the electrical attributes that are commonly monitored, and how they can affect the quality of test.
"Determining Inductance In Contactors"
Ryan Satrom
Everett Charles Technologies
"Evaluation of a New Low Inductance Socket Technology - For High Speed Memory Device Testing"
Joachim Moerbt
Advantest (Europe) GmbH
"Socket Life Cycle RF Testing"
Gert Hohenwarter
GateWave Northern, Inc.

Session 2

Socket Analysis and Characterization Methods

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The Test and Burn-in Socket world is continually changing. Challenges are on the rise in areas of alignment (fine pitch), modeling (speed, performance, and thermal), and measurement (Cres). To meet all of the different requirements, suppliers need to develop means to analyze and characterize their customer's needs. This session will focus on techniques and data that have been developed and used to determine the maximum performance from a socket.
"Revolutionizing High-Speed Socket Test"
Michael de Bie
Boris Coto
Rafiq Hussain
"Understanding Impact of Burn-In Sockets on Fragile Semiconductor Packages Using Finite Element Analysis"
Prasanth Ambady
Sensata Technologies
Keith Crowe
Sensata Technologies 
Hide Furukawa
Sensata Technologies 
"Contact Resistance is Sexy Again"
Tim Swettlen
Intel Corporation
Morten Jensen
Intel Corporation

Session 3

  Pushing the Power/Thermal Envelope

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If you are planning on pushing the power/thermal envelope in your BiTS applications, this session is for you. The trio of authors in this session will provide key insight into a number of distinct, yet interrelated, disciplines essential for success with higher power applications, including general design considerations and modeling/optimizing for high current, as well as the introduction of a novel thermal interface measurement technique.
"Comparison of Methods for Measuring Residual Stresses in Connector Alloy Strip for BiTS Applications"
John Harkness, FASM
Brush Wellman Incorporated
"Socket and Heat Sink Considerations in High Power Burn-in"
John McElreath
Micro Control Company
"Determining Thermal Resistance Characteristics Without a Power Sensor"
Trent Johnson
Jerry Tustaniwskyj
Delta Design

Tuesday, March 13,  2007


Session 4

  Trends in Contact Technologies

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Electrical Contacts: tighter pitches, greater electrical integrity, more cycles and lower cost make for a demanding set of requirements. Yet with fresh looks at, and innovative approaches to, current technologies, plus the introduction of novel new ones, this session's authors will leave you with many options to choose from in selecting the contact that suits your technical and business needs.
"Next Generation Contact Technology For Fine Pitch Semiconductor Test"
Valts Treibergs
Everett Charles Technologies
Jason Mroczkowski
Everett Charles Technologies
" 'Off-set' Pin Contact Innovation - An Effective Contact Solution to Pb-Free Devices for MT8704iHF (Multitest) Test Handler"
Ariel Sabellon
Cypress - Philippines
Eugene F. Batilo
Cypress - Philippines
"Braided Electrical Contact Element (BeCe)"
Che-Yu Li
Che-Yu Li and Company, LLC
"Elastomeric Interconnects - Reliable Enough for Production?"
Frank Bumb
Phoenix Test Arrays
Jack Pereschuk
Phoenix Test Arrays
Nick Langston, Sr.
Antares Advanced Test Tech.

Session 5

  PCB Advancements and Opportunities

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With reduced pitch and higher frequencies creating challenges for the socketing and contacting community, the Printed Circuit Board (PCB) portion of the system can not be forgotten. In this session we will explore some technologies, techniques and methods to improve PCB performance and quality.
“Socket Signal Integrity - Impact from IC & Board”
James Zhou
Antares Advanced Test Tech.
Jiachun (Frank) Zhou
Antares Advanced Test Tech.
“Minimizing Socket & Board Inductance Using a Novel Decoupling Interposer”
Nicholas Langston, Sr.
Antares Advanced Test Tech.
James Zhou
Antares Advanced Test Tech.
Hongjun Yao
Antares Advanced Test Tech.
“Benchmarking Printed Circuit Board Fabrication Suppliers Using IPC's PCQR2 Database”
Bill Mack
Texas Instruments Inc.

Hot Topics Session

  Advancements in Contacting Leading Edge Packages

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Whether it's WLP, WLCSP, POP or other leading edge device packaging, the pursuit of fresh and innovative contacting / socketing technologies is underway. In this session, with a focus on addressing the contacting challenges presented by leading edge packaging, you'll hear about three novel approaches to deal with wafer level and 3D packages.
"Novel Low Cost Test and Burn-in Wafer Level Packaging"
Belgacem Haba, Ph.D.
Tessera, Inc.
David Ovrutsky
Tessera, Inc.
Guilian Gao, Ph.D.
Tessera, Inc.
Vage Oganesian
Tessera, Inc.
"A New Probe Card Approach for Wafer Level Chip Scale Package Testing"
Norman J. Armendariz, Ph.D.
Texas Instruments, Inc
"POP Rocks: Approaches to Socketing Package-on-Package Devices"
Jon Diller
Interconnect Devices, Inc.
Kiley Beard
Interconnect Devices, Inc.
Jamie Andes
Interconnect Devices, Inc.

Wednesday, March 14,  2007


Session 6

  Socket Design and Use Challenges

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The design of effective & reliable socketing solutions requires understanding both specific design elements and the interface of the socket and the package. In this session our authors will share assessments, methodologies, analyses and solutions that improve socket design and performance. You'll come away with some new ideas to consider for your operations.
"Spring-Probe Based Socket Design for Fine-Pitch Applications"
Tushar Mazumder
Emulation Technology, Inc.  
"Challenges of Molding ESD Grade Plastics"
Andrew Gattuso 
Foxconn Electronics Inc.
Dr. Shih-Wei Hsiao
Foxconn Electronics Inc.
"Monte Carlo Based Package to Socket Alignment Assessment Methodology"

Also presented at: 

David Shia 
Intel Corporation
Wei-ming Chi
Mobility Electronics
"Auto Contact Cleaning Engineering Study Applied to Package Test"

Also presented at: 
Byron Gibbs
Texas Instruments, Inc.
Kevin McNamara
Delta Design

Session 7

  Exploring Handler, Socket & Device Interfacing

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With today's challenging package geometries it is no easy task getting the devices through the handler and properly placed in the contactor to make solid electrical contact. This session will review some issues and solutions of the important, but often ignored, area of device handling and contacting.
"The Importance of the Mechanical Interface in Final Test Efficiency"
Mark Stenholm
Antares Advanced Test Technologies
"Effects of Handler Insertion Variations on Contactor Performance for Pb-Free Devices"
Jeff Sherry
Johnstech International Corp.
"Contacting Solution for Optical Sensor IC - HD DVD Application"
Gerhard Gschwendtberger
Multitest elektronische Systeme GmbH

Awards / Closing Remarks

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After three days loaded with information and networking, it's now time wrap-up. Here are a few closing remarks and some recognition to the people and papers that have distinguished themselves in one way or another at BiTS 2007.


Page last modified 03/28/11

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