{"id":982,"date":"2014-03-10T12:30:30","date_gmt":"2014-03-10T19:30:30","guid":{"rendered":"https:\/\/www.testconx.org\/premium\/?p=982"},"modified":"2023-05-15T09:59:51","modified_gmt":"2023-05-15T16:59:51","slug":"tutorial-test-101-a-holistic-view-of-test","status":"publish","type":"post","link":"https:\/\/www.testconx.org\/premium\/2014\/tutorial-test-101-a-holistic-view-of-test\/","title":{"rendered":"Tutorial – Test 101: A Holistic View of Test"},"content":{"rendered":"\n

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Tutorial – Test 101: A Holistic View of Test<\/h1>\n\n

Peter Ehlig<\/strong>
\nFellow
\nTexas Instruments<\/p>\n

Abstract<\/strong>
\nThere are many stake holders with respect to the topic of test. Peter Ehlig expected that the very audience represented Test Engineers, Test Equipment Suppliers, Quality Engineers, and Design For Test Engineers. All have areas of expertise and own perspectives. Other perspectives of interest to us include customer, the end user, the manufacturing sites, the boss and their boss\u2019 boss.<\/p>\n

In Peter's part of this seminar on Test 101, he discusses the fundamentals of test from the perspective of all stakeholders. From a holistic view he leads a discussion on how test works, and his area of expertise, how test sometimes doesn\u2019t work.<\/p>\n

He leads a discussion as to take advantage of the expertise in the audience to work through some of the common challenges in testing today\u2019s complex products. Having been involved in High Tech for over 3\u00bd decades he has at least dabbled with most if not all these different perspectives and opened the discussion to many challenges that might come across in areas such as: validation and characterization of test suites and hardware; Burn-in; power and temperature control; yield understanding; test cost; debug environments, etc.<\/p>\n

Biography<\/strong>
\nPeter Ehlig has over 35 years of service in high tech industry, with experience ranging from high level system design and architecture to semi-conductor physics, and most of the places in between.<\/p>\n

This broad range of experience provides a holistic view of quality, test, debug, and failure analysis. At the system level he\u2019s worked with communications, computer, automotive, and military architectures. At the device level he\u2019s worked on CPU\/DSP, embedded memories, and SOC architectures. At the silicon level Mr. Ehlig has worked on optimization for performance, power, price, yield, and reliability. When working on any new architecture, on any level, his approach is to maintain an appropriate balance across considerations of performance, power, price, manufacturability, testability, and rapid debug.<\/p>\n

Mr. Ehlig is the Inventor\/co-inventor on 44 US patents. He has published several papers and articles and has participated as a panelist on panel discussions at the International Test Conference and at the VLSI Test Symposium.<\/p>\n\n

Part One<\/strong><\/p>\n