{"id":7878,"date":"2025-09-01T04:45:16","date_gmt":"2025-09-01T11:45:16","guid":{"rendered":"https:\/\/www.testconx.org\/premium\/?page_id=7878"},"modified":"2026-01-19T16:12:01","modified_gmt":"2026-01-20T00:12:01","slug":"testconx-china-2025","status":"publish","type":"page","link":"https:\/\/www.testconx.org\/premium\/testconx-china-2025\/","title":{"rendered":"TestConX China 2025"},"content":{"rendered":"
\"Image\"<\/span>

Shanghai\u00a0November 13, 2025<\/span><\/strong><\/h1>\n<\/div><\/div><\/div>
\n

Hilton Shanghai Hongqiao International Airport<\/a><\/h4>\n<\/div>\n
No. 1 Yunsha Road,
Changning District, Shanghai, 200335, China<\/a><\/div>\n

 Workshop registration includes all technical sessions, the TestConX EXPO, buffet lunch, morning & afternoon tea breaks, <\/span>and download of the Proceedings.<\/span><\/span><\/p><\/div><\/div><\/div><\/div><\/div>

EXPO<\/span><\/div><\/div><\/a>

TestConX<\/span><\/a>, over the course of its twenty-six-year history, has established itself as the preeminent event for test consumables, test cell integration, and test operations. The program scope includes packaged semiconductor “final” test, burn-in, system level test, and beyond to encompass all practical aspects of electronics testing such as validation, advanced packaging testing, module test, and finished product test.<\/span><\/p>\n

Join us in-person for the 11th annual TextConX China<\/strong>! You will not want to <\/span>miss this opportunity to be part of TestConX as we connect a larger community of test professionals and to participate in this excellent event!<\/span><\/p>\n

 <\/p><\/div>

<\/div><\/div><\/div>

Thursday November 13, 2024<\/strong><\/h1>\n<\/div><\/div><\/div>
<\/div><\/div><\/div>

9:00<\/h1>\n<\/div><\/div><\/div><\/div>
\n
\n
Welcome<\/div><\/div>
Welcome<\/div>
<\/div>

<\/p><\/div>

\n
\n“Opening Remarks” \n<\/div>\n
\n
\n
\nIra Feldman\n <\/div>\n\t
\nFeldman Engineering\n\t <\/div>\n <\/div>\n<\/div>\n<\/div>\n<\/div>\n\t \n
<\/div><\/div><\/div>
<\/div>
\n
\n
Keynote<\/div><\/div>
<\/div>
<\/div>

<\/p><\/div>

\n
\n“Test Insertions and Test Challenges for AI-HPC in CoWoS and CoPoS Advanced Heterogeneous Integrated Packages.” \n
“CoWoS\u4e0eCoPoS\u5148\u8fdb\u5f02\u6784\u96c6\u6210\u5c01\u88c5\u4e2dAI-HPC\u7684\u6d4b\u8bd5\u63d2\u5165\u70b9\u4e0e\u6d4b\u8bd5\u6311\u6218” \n<\/div>\n
\n
\n
\nJeorge Hurtarte\n <\/div>\n\t
\nTeradyne\n\t <\/div>\n <\/div>\n<\/div>\n
\n\tAbstract (English)<\/summary>\n

Abstract<\/strong><\/p>\r\n\r\n

As AI-HPC (High Performance Computing) solutions continue to evolve from single compute devices (GPUs or Switches) into advanced heterogeneous integrated packages with multiple chiplets (e.g., HBMs, GPUs and Switches with UCIe interfaces, Silicon Photonics ICs, etc.) in a silicon wafer or panel interposer (aka CoW: chip-on-wafer; CoP: chip-on-panel), and then on to the final package substrate (CoWoS: chip-on-wafer-on-substrate), the test complexity is increasing significantly, as well as the number of possible test insertions.<\/p>\r\n\r\n

This presentation provides an overview of this trend and related new test challenges which also require new test strategies that will guarantee both known-good-die and known-good-CoW to optimize the overall cost of test, while maximizing the final test insertion yield and quality of the finished CoWoS device.<\/p>\r\n<\/p><\/details>\n

\n\t\u6458\u8981 (Chinese)<\/summary>\n

\r\n

\r\n \u968f\u7740AI-HPC\uff08\u9ad8\u6027\u80fd\u8ba1\u7b97\uff09\u89e3\u51b3\u65b9\u6848\u6301\u7eed\u6f14\u8fdb\uff0c\u4ece\u5355\u4e00\u8ba1\u7b97\u5668\u4ef6\uff08\u5982GPU\u6216\u4ea4\u6362\u673a\uff09\u53d1\u5c55\u4e3a\u91c7\u7528\u7845\u4e2d\u4ecb\u5c42\u6216\u9762\u677f\u4e2d\u4ecb\u5c42\uff08\u5373CoW\uff1a\u6676\u5706\u4e0a\u82af\u7247\uff1bCoP\uff1a\u9762\u677f\u4e0a\u82af\u7247\uff09\u7684\u3001\u96c6\u6210\u591a\u82af\u7c92\uff08\u4f8b\u5982HBM\u3001\u5e26UCIe\u63a5\u53e3\u7684GPU\u548c\u4ea4\u6362\u673a\u3001\u7845\u5149\u82af\u7247\u7b49\uff09\u7684\u5148\u8fdb\u5f02\u6784\u96c6\u6210\u5c01\u88c5\uff0c\u5e76\u6700\u7ec8\u642d\u8f7d\u4e8e\u5c01\u88c5\u57fa\u677f\u4e4b\u4e0a\uff08CoWoS\uff1a\u57fa\u677f\u4e0a\u6676\u5706\u4e0a\u82af\u7247\uff09\uff0c\u6d4b\u8bd5\u7684\u590d\u6742\u6027\u4ee5\u53ca\u6f5c\u5728\u7684\u6d4b\u8bd5\u63d2\u5165\u70b9\u6570\u91cf\u5747\u663e\u8457\u589e\u52a0\u3002\r\n <\/p>\r\n

\r\n \u672c\u6f14\u8bb2\u5c06\u6982\u8ff0\u8fd9\u4e00\u8d8b\u52bf\u53ca\u76f8\u5173\u7684\u65b0\u6d4b\u8bd5\u6311\u6218\uff0c\u8fd9\u4e9b\u6311\u6218\u4e5f\u8981\u6c42\u65b0\u7684\u6d4b\u8bd5\u7b56\u7565\uff0c\u4ee5\u4fdd\u8bc1\u5df2\u77e5\u826f\u54c1\u82af\u7247\u548c\u5df2\u77e5\u826f\u54c1CoW\uff0c\u4ece\u800c\u4f18\u5316\u603b\u4f53\u6d4b\u8bd5\u6210\u672c\uff0c\u540c\u65f6\u6700\u5927\u5316\u6700\u7ec8CoWoS\u5668\u4ef6\u7684\u6d4b\u8bd5\u76f4\u901a\u826f\u7387\u4e0e\u4ea7\u54c1\u8d28\u91cf\u3002\r\n <\/p>\r\n<\/div>\r\n<\/p><\/details>\n\"\"<\/a>

<\/div>\"PDF-Icon<\/a> Presentation Download<\/a><\/div>\n<\/div>\n\t \n
\"Image\"<\/span><\/div>
Dr. Jeorge S. Hurtarte is currently Senior Director and Principal Marketing Strategist in the Semiconductor Compute Test Division at Teradyne. Jeorge has held various technical, management and executive positions at Teradyne, Lam Research, LitePoint, TranSwitch, and Rockwell Semiconductors. Jeorge is in the Advisory Board of SEMI of North America and serves as co-chair of the IEEE Heterogeneous Integration Roadmap (HIR) Test Chapter. Jeorge holds a PhD in Electrical Engineering, and three master\u2019s degrees (MBA, Computer Science, and Telecommunications). He is also visiting professor at the University of California, Santa Cruz and at the University of Phoenix. He is co-author of the book Understanding Fabless IC Technology.\n\n\n<\/div><\/div><\/div><\/div><\/div><\/div><\/div>
<\/div>
<\/div><\/div>
\n
\n
Market<\/div><\/div>
Market<\/div>
<\/div>

<\/p><\/div>

\n
\n“Navigating Market Shifts: The Future of Test and Burn-In Sockets in the AI Era” \n
“\u9a7e\u9a6d\u5e02\u573a\u53d8\u5c40\uff1aAI\u65f6\u4ee3\u6d4b\u8bd5\u4e0e\u8001\u5316\u63d2\u5ea7\u7684\u672a\u6765” \n<\/div>\n
\n
\n
\nJohn West\n <\/div>\n\t
\nYole Group\n\t <\/div>\n <\/div>\n
\n
\nMerle Zhao\n <\/div>\n\t
\nYole Group\n\t <\/div>\n <\/div>\n<\/div>\n
\n\tAbstract - Biography (English)<\/summary>\n

\r\n

\r\n The explosive growth of artificial intelligence is creating new challenges and market imbalances within the semiconductor industry. \r\n At the same time, governments are intervening through subsidies, tariffs, and other protectionist policies. \r\n The result of these powerful drivers will be a redefinition of global competition across the supply chain.\r\n <\/p>\r\n

\r\n This presentation examines how these forces are driving today\u2019s market transformation and their implications for suppliers and buyers of test and burn-in sockets, \r\n highlighting both the risks and opportunities that lie ahead.\r\n <\/p>\r\n<\/div>\r\n<\/p>

John West<\/strong> is a Senior Director of the Semiconductor Subsystems and Test Division at Yole Group. He has over 20 years of industry experience and a successful track record in various strategy and consulting projects.<\/p>\r\n\r\n

John has a Bachelor's degree in Medical Physics from King's College London and an MBA from Cranfield School of Management.<\/p>\r\n\r\n

Merle Zhao<\/strong> is a market researcher in the Manufacturing and Global Supply Chain Business Line at Yole Group. Merle collects information on technical and market trends, customer opinions, and investments. His aim is to provide valuable data related to the Chinese market and contribute to the development of significant analysis focusing on semiconductor equipment, subsystems, test, packaging, substrates and materials, and global semiconductors.<\/p>\r\n\r\n

Prior to joining Yole Group, Merle accumulated five years of in-depth study and experience in the Chinese semiconductor industry. His expertise spans Chinese fabs, manufacturing processes, materials, tools, and compound semiconductors. Merle graduated from East China University of Science and Technology (China).<\/p>\r\n\r\n<\/p><\/details>\n

\n\t\u6458\u8981 (Chinese)<\/summary>\n

\r\n

\r\n \u4eba\u5de5\u667a\u80fd\u7684\u7206\u70b8\u6027\u589e\u957f\u6b63\u5728\u534a\u5bfc\u4f53\u884c\u4e1a\u5185\u5f15\u53d1\u65b0\u7684\u6311\u6218\u4e0e\u5e02\u573a\u5931\u8861\u3002\u4e0e\u6b64\u540c\u65f6\uff0c\u5404\u56fd\u653f\u5e9c\u6b63\u901a\u8fc7\u8865\u8d34\u3001\u5173\u7a0e\u53ca\u5176\u4ed6\u4fdd\u62a4\u4e3b\u4e49\u653f\u7b56\u8fdb\u884c\u5e72\u9884\u3002\r\n \u8fd9\u51e0\u80a1\u5f3a\u5927\u9a71\u52a8\u529b\u7684\u5171\u540c\u4f5c\u7528\uff0c\u5c06\u91cd\u65b0\u5b9a\u4e49\u8d2f\u7a7f\u6574\u4e2a\u4f9b\u5e94\u94fe\u7684\u5168\u7403\u7ade\u4e89\u683c\u5c40\u3002\r\n <\/p>\r\n

\r\n \u672c\u6f14\u8bb2\u5c06\u5ba1\u89c6\u8fd9\u4e9b\u529b\u91cf\u5982\u4f55\u9a71\u52a8\u5f53\u524d\u7684\u5e02\u573a\u53d8\u9769\uff0c\u5e76\u5206\u6790\u5176\u5bf9\u6d4b\u8bd5\u4e0e\u8001\u5316\u63d2\u5ea7\u7684\u4f9b\u5e94\u5546\u53ca\u91c7\u8d2d\u5546\u6240\u4ea7\u751f\u7684\u5f71\u54cd\uff0c\u91cd\u70b9\u63ed\u793a\u672a\u6765\u6240\u8574\u542b\u7684\u98ce\u9669\u4e0e\u673a\u9047\u3002\r\n <\/p>\r\n<\/div>\r\n<\/p>

<\/p><\/details>\n\"\"<\/a>

<\/div>\"PDF-Icon<\/a> Presentation Download<\/a><\/div>\n<\/div>\n\t \n<\/div><\/div><\/div>

10:45<\/h1>\n<\/div><\/div><\/div><\/div>

Break & Networking<\/strong><\/h1>\nEnjoy time to meet with the presenters and network while refreshments are served.<\/span><\/span><\/div><\/div><\/div>
<\/div><\/div><\/div>

11:15<\/h1>\n<\/div><\/div><\/div><\/div>
\n
\n
Session 2<\/div><\/div>
<\/div>
<\/div>

<\/p><\/div>

\n
\n“Implementing Effective Test Limits for Rapid Root-Cause Analysis in RMA Investigations” \n
“\u5728RMA\u8c03\u67e5\u4e2d\u5b9e\u65bd\u6709\u6548\u6d4b\u8bd5\u9650\u503c\u4ee5\u5b9e\u73b0\u5feb\u901f\u6839\u56e0\u5206\u6790” \n<\/div>\n
\n
\n
\nHailin Wang\n <\/div>\n\t
\nElevATE Semiconductor\n\t <\/div>\n <\/div>\n
\n
\nDavid Chang\n <\/div>\n\t
\nElevATE Semiconductor\n\t <\/div>\n <\/div>\n<\/div>\n
\n\tAbstract - Biography (English)<\/summary>\n

\r\nReturn Material Authorization (RMA) investigations are essential for semiconductor quality assurance, enabling functional failures to be traced back to their root causes. In this study, we examine an RMA case in which a production device exhibited a complete loss of critical timing measurements after an unspecified period in service. Automated Test Equipment (ATE) and bench tests revealed that one channel failed to meet multiple timing specifications, while the other channel remained within acceptable limits which highlighted a clear functional divergence.\r\n<\/p>\r\n\r\n

\r\nTo isolate the anomaly, register-level readback tests were added to the test program. These tests consistently showed deviations in specific comparator configuration registers on the failing channel, confirming a localized functional fault. Guided by these electrical test results, a structured failure analysis protocol was initiated. The device was decapsulated and subjected to high-magnification optical inspection, which identified a process-related defect: metal-to-metal shorting across parallel interconnect lines within the comparator block.\r\n<\/p>\r\n\r\n

\r\nFocused Ion Beam (FIB) cross-sectioning and Scanning Electron Microscopy (SEM) further characterized the defect, revealing a foreign particle lodged beneath the passivation layer at an interconnect level. Energy Dispersive X-ray Spectroscopy (EDS) analysis determined the particle composition to be tungsten, thereby confirming its role in creating an unintended conductive path that led to register read\/write failures.\r\n<\/p>\r\n\r\n

\r\nThis case study underscores the importance of defining precise test limits and incorporating comprehensive functional coverage. Tests that span both channel-level performance metrics and register-level checks can help efficiently formulate and validate root-cause hypotheses. By establishing dynamic specification boundaries and augmenting ATE programs with targeted register tests, latent fabrication defects can be detected early, streamlining physical failure analysis (PFA) efforts.\r\n<\/p>\r\n\r\n

\r\nImplementing this integrated approach not only reduces RMA turnaround time and associated costs but also feeds back into production test development, enhancing screening effectiveness to prevent future escapes. We conclude with recommendations for optimizing test programs such as adaptive limit setting, expanded register functional coverage, and closer collaboration between test engineering and failure analysis teams to bolster overall product reliability and accelerate root-cause resolution in high-volume semiconductor manufacturing and production.\r\n<\/p>\r\n<\/p>

\r\n

\r\n Hailin is an Applications Engineer at ElevATE Semiconductor with a strong engineering background and a passion for innovation. He holds a degree from the University of Toronto, where he also engaged in academic research collaborations, and has professional experience spanning software development and mixed-signal engineering. Dedicated to tackling complex technical challenges and fostering opportunities for students, Hailin is committed to advancing the field of semiconductor test while inspiring the next generation of professionals. He is currently pursuing a master\u2019s degree at UC Berkeley, focusing on applying statistical models and data science principles to enhance test engineering.\r\n <\/p>\r\n<\/div>\r\n<\/p><\/details>\n

\n\t\u6458\u8981 - \u7b80\u4ecb (Chinese)<\/summary>\n

\r\n

\r\n \u9000\u8d27\u6388\u6743\uff08RMA\uff09\u8c03\u67e5\u662f\u534a\u5bfc\u4f53\u8d28\u91cf\u4fdd\u8bc1\u7684\u5173\u952e\u73af\u8282\uff0c\u80fd\u591f\u5c06\u6f5c\u5728\u7684\u529f\u80fd\u5931\u6548\u8ffd\u6eaf\u81f3\u5176\u6839\u672c\u539f\u56e0\u3002\u5728\u672c\u7814\u7a76\u4e2d\uff0c\u6211\u4eec\u5206\u6790\u4e86\u4e00\u8d77RMA\u6848\u4f8b\uff1a\u91cf\u4ea7\u5668\u4ef6\u5728\u670d\u5f79\u4e00\u6bb5\u65f6\u95f4\u540e\uff0c\u5176\u7cbe\u5bc6\u6d4b\u91cf\u6a21\u5757\u7684\u7cbe\u5ea6\u6307\u6807\u51fa\u73b0\u9000\u5316\u3002\u81ea\u52a8\u6d4b\u8bd5\u8bbe\u5907\uff08ATE\uff09\u4e0e\u53f0\u67b6\u8868\u5f81\u63ed\u793a\u4e86\u660e\u663e\u7684\u901a\u9053\u5dee\u5f02\uff1a\u5931\u6548\u901a\u9053\u65e0\u6cd5\u4fdd\u6301\u6240\u9700\u7684\u7cbe\u5ea6\u89c4\u8303\uff0c\u800c\u5176\u4ed6\u901a\u9053\u5219\u4ecd\u5728\u89c4\u683c\u8303\u56f4\u5185\u3002\r\n <\/p>\r\n

\r\n \u4e3a\u4e86\u9694\u79bb\u5e76\u9a8c\u8bc1\u5931\u6548\u673a\u7406\uff0c\u8fdb\u884c\u4e86\u6709\u9488\u5bf9\u6027\u7684\u7535\u5e94\u529b\u6d4b\u8bd5\uff0c\u5e76\u7ed3\u5408\u65e9\u671f\u5931\u6548\u7387\uff08ELFR\uff09\u9a8c\u8bc1\u5b9e\u9a8c\u3002\u8fd9\u4e9b\u5b9e\u9a8c\u4e0d\u4ec5\u9a8c\u8bc1\u4e86\u65b0\u7684ATE\u7b5b\u9009\u65b9\u6cd5\u7684\u6709\u6548\u6027\uff0c\u8fd8\u5728\u540e\u7eedRMA\u4e2d\u5f97\u5230\u8fdb\u4e00\u6b65\u786e\u8ba4\uff0c\u8bc1\u660e\u5176\u5728\u8bc6\u522b\u6f5c\u5728\u5668\u4ef6\u7f3a\u9677\u65b9\u9762\u7684\u4ef7\u503c\u3002\u5c40\u90e8\u7535\u5f02\u5e38\u6d4b\u8bd5\u4e3a\u540e\u7eed\u5931\u6548\u5206\u6790\u63d0\u4f9b\u4e86\u65b9\u5411\u3002\u901a\u8fc7\u53bb\u5c01\u88c5\u3001\u9ad8\u500d\u5149\u5b66\u663e\u5fae\u955c\u68c0\u67e5\u4ee5\u53ca\u626b\u63cf\u7535\u5b50\u663e\u5fae\u955c\uff08SEM\uff09\u5206\u6790\uff0c\u786e\u8ba4\u4e86\u53d7\u5f71\u54cd\u7535\u8def\u4e2d\u5b58\u5728\u4e0e\u5de5\u827a\u76f8\u5173\u7684\u7f3a\u9677\uff0c\u5e76\u4e0e\u89c2\u6d4b\u5230\u7684\u7535\u6c14\u5931\u6548\u5f62\u6210\u4e86\u7269\u7406\u5bf9\u5e94\u3002\r\n <\/p>\r\n

\r\n \u672c\u6848\u4f8b\u5f3a\u8c03\u4e86\u7cbe\u786e\u5b9a\u4e49\u6d4b\u8bd5\u9650\u503c\u7684\u91cd\u8981\u6027\uff0c\u5e76\u6307\u51fa\u901a\u8fc7\u7ed3\u5408\u57fa\u4e8e\u5e94\u529b\u7684\u9a8c\u8bc1\u65b9\u6cd5\u6765\u589e\u5f3aATE\u6d4b\u8bd5\u8986\u76d6\u5ea6\uff0c\u53ef\u4ee5\u66f4\u6709\u6548\u5730\u68c0\u6d4b\u6f5c\u5728\u7684\u5236\u9020\u7f3a\u9677\u3002\u5229\u7528\u52a8\u6001\u89c4\u8303\u8fb9\u754c\u4e0eELFR\u9a8c\u8bc1\u7684\u7b5b\u9009\u673a\u5236\uff0c\u6d4b\u8bd5\u5de5\u7a0b\u56e2\u961f\u80fd\u591f\u52a0\u901f\u6839\u56e0\u5b9a\u4f4d\u5e76\u7f29\u77edRMA\u5904\u7406\u5468\u671f\u3002\u8fd9\u4e00\u7efc\u5408\u65b9\u6cd5\u4e0d\u4ec5\u51cf\u5c11\u4e86\u5ba2\u6237\u5f71\u54cd\u548c\u76f8\u5173\u6210\u672c\uff0c\u540c\u65f6\u4e5f\u63d0\u5347\u4e86\u91cf\u4ea7\u7b5b\u9009\u7684\u6709\u6548\u6027\u3002\u6211\u4eec\u6700\u540e\u63d0\u51fa\u4f18\u5316\u6d4b\u8bd5\u65b9\u6848\u7684\u5efa\u8bae\uff0c\u5305\u62ec\u81ea\u9002\u5e94\u9650\u503c\u8bbe\u5b9a\u3001\u57fa\u4e8e\u5e94\u529b\u7684\u8986\u76d6\u6269\u5c55\uff0c\u4ee5\u53ca\u4ea7\u54c1\u5de5\u7a0b\u4e0e\u5931\u6548\u5206\u6790\u56e2\u961f\u7684\u7d27\u5bc6\u534f\u4f5c\uff0c\u4ee5\u589e\u5f3a\u9ad8\u4ea7\u91cf\u534a\u5bfc\u4f53\u5236\u9020\u4e2d\u7684\u957f\u671f\u53ef\u9760\u6027\u3002\r\n <\/p>\r\n<\/div>\r\n<\/p>

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\r\n Hailin \u662f ElevATE Semiconductor \u7684\u5e94\u7528\u5de5\u7a0b\u5e08\uff0c\u5177\u5907\u624e\u5b9e\u7684\u5de5\u7a0b\u80cc\u666f\u5e76\u5bf9\u521b\u65b0\u5145\u6ee1\u70ed\u60c5\u3002\u4ed6\u6bd5\u4e1a\u4e8e\u591a\u4f26\u591a\u5927\u5b66\uff0c\u5e76\u53c2\u4e0e\u4e86\u591a\u9879\u5b66\u672f\u7814\u7a76\u5408\u4f5c\uff0c\u804c\u4e1a\u7ecf\u5386\u6db5\u76d6\u8f6f\u4ef6\u5f00\u53d1\u4e0e\u6df7\u5408\u4fe1\u53f7\u5de5\u7a0b\u3002Hailin \u81f4\u529b\u4e8e\u89e3\u51b3\u590d\u6742\u7684\u6280\u672f\u6311\u6218\u5e76\u4e3a\u5b66\u751f\u521b\u9020\u673a\u4f1a\uff0c\u4e13\u6ce8\u4e8e\u63a8\u52a8\u534a\u5bfc\u4f53\u6d4b\u8bd5\u9886\u57df\u7684\u53d1\u5c55\uff0c\u540c\u65f6\u6fc0\u52b1\u4e0b\u4e00\u4ee3\u5de5\u7a0b\u4e13\u4e1a\u4eba\u624d\u3002\u4ed6\u76ee\u524d\u6b63\u5728\u52a0\u5dde\u5927\u5b66\u4f2f\u514b\u5229\u5206\u6821\u653b\u8bfb\u7855\u58eb\u5b66\u4f4d\uff0c\u7814\u7a76\u91cd\u70b9\u662f\u8fd0\u7528\u7edf\u8ba1\u6a21\u578b\u548c\u6570\u636e\u79d1\u5b66\u539f\u7406\u63d0\u5347\u6d4b\u8bd5\u5de5\u7a0b\u6c34\u5e73\u3002\r\n <\/p>\r\n<\/div>\r\n<\/p><\/details>\n\"\"<\/a>

<\/div>\"PDF-Icon<\/a> Presentation Download<\/a><\/div>\n
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\n“Test Solutions on ATE platform for All Kinds of Automotive Transceivers” \n
“\u5168\u65b9\u4f4d\u6c7d\u8f66\u6536\u53d1\u5668 ATE \u6d4b\u8bd5\u65b9\u6848” \n<\/div>\n
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\nJibao Fan\n <\/div>\n\t
\nAdvantest\n\t <\/div>\n <\/div>\n<\/div>\n
\n\tAbstract - Biography (English)<\/summary>\n

Automotive System Basis Chip (SBC) is an integrated component that combines common system features required on automotive ECUs, such as communication transceivers, voltage regulators, diagnostics and supervision functions, switches, and wake inputs. \r\nAs a crucial communication transceiver, CAN transceiver is applied into engine control, transmission, and braking successfully. Under the situation of digitization, electrification, and automation in the flied of automotive, traditional CAN transceiver (1Mbit\/s, 8Bytes Payload) is hard to meet all kind of application requirements. The newly developed CAN-FD signal improvement capability (8Mbit\/s, 64Bytes Payload) by BOSCH is more prevalent in sophisticated ADAS and AV applications and lead the industry, which also bring test challenges into ATE inevitably.<\/p>\r\n\r\n

First, the CAN-FD test principle is introduced in this paper. For CAN-FD, mainly the timing test, that is propagation delay includes TXDCAN to CANH\/L DIFF (ns), TXDCAN to RXDCAN (ns) and CANH\/L DIFF to RXCAN (ns), which are all very demanding with the nano-seconds level resolution and sensitive to CAN-FD differential load circuit. In additional, the complicated algorithm for differential signal is the last but not the least part to guarantee the test specification.<\/p>\r\n\r\n

Second, this paper will illustrate the CAN-FD differential CANH\/CANL load circuit design. On the one hand, PS1600 and AVI64 differential pair must be for CANH and CAHL. CANH should be positive in differential pair. For example, CH1\/CH3, CH2\/CH4 for AVI64 and A1\/A3, A2\/A4 for PS1600. Same trace length should be over all sites for site correlation which we have seen from case study in evaluation board. On the other hand, the load circuit between CANH and CANL selects symmetrical resistors combination by mechanical relay G6K for different load condition.<\/p>\r\n\r\n

Based on above, this paper provides almost all possible test solutions according to some real SBC projects. These solutions mainly focus on CANH\/CANL as below:<\/p>\r\n\r\n