BiTS 2016 Archive Program

Hopefully you didn't miss a minute of the BiTS 2016 Technical Program, with eight jam-packed sessions plus a poster session with presentations by test and burn-in experts from around the world. This is complimented with an excellent Tutorial on Sunday, the ever-popular BiTS EXPO, and numerous networking and social events.

With more excellent presentations than could fit in the schedule, the Program Committee was challenged to assemble the BiTS 2016 program. We hope that you enjoy the best available presentations and posters covering all aspects of test and burn-in.

Please see the entire schedule below...

Tutorial Day
Sunday March 6, 2016
noon - 6:00 PM
Adaptive Test, Outlier Analysis, and Burn-In reduction/elimination
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Jeffrey Roehr
Senior Member of Technical Staff
Texas Instruments

This tutorial is designed to give attendees useful and practical information on the theory and statistics that support the application and use of Adaptive Test (AT) and Outlier Analysis (OA) in the production of modern semiconductor devices. In addition to providing information on the technical background behind these methods, the tutorial will include discussion of papers and case studies of real world applications of these techniques, emphasizing Burn-In elimination or reduction in production testing.

The goal of the tutorial is to provide attendees with the information and knowledge that they need to understand how (and when) AT & OA strategies are effective, the risk/reward relation implicit in these methods, the basic constraints and limitations of their use, and to walk away with the ability to implement fundamental techniques on their own. Sources of the material for this tutorial include personal experience, as well as extracts and references to papers and reports published by Universities and companies such as IBM, Intel, Analog Devices, LSI Logic, AMD, NXP, and Texas Instruments. Resource links to a variety of technical papers, authors, and 3rd party software vendors will also be provided as part of the tutorial materials.

The tutorial will be led by Jeffrey Roehr who is a Senior Member of the Technical Staff at Texas Instruments, a 35 year veteran of product and test engineering, and a Senior Member of the IEEE.

Note: Attendance at the tutorial will be limited. Please sign-up early to not miss out!

Jeffrey Roehr has over 35 years of experience in Product and Test Engineering and Management for RCA, GTE, Analog Devices, Mediatek, and is now working for Texas Instruments in Houston.

For the past 15 years his focus has been on developing algorithms for adaptive testing, outlier elimination, and statistical testing on very high volume production products.

Mr. Roehr has presented many papers, tutorials, and invited talks at IEEE events. He is a Senior Member of the IEEE, a member of the IEEE DATA Workshop Steering Committee, a member of the ITRS Adaptive Test working group, and is the founder and chairman of the Texas Instruments Data Analysis Workshop (DAW).

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6:30 - 7:30 PM
Welcome Reception
If this is your seventeenth time attending BiTS Workshop, only your first, or somewhere in-between you will feel welcomed at the opening reception by friends old and new.
7:30 - 8:30 PM
The first of many excellent meals awaits as you get to network with other industry professionals. This is a great time to catch up with old colleagues or start meeting new friends.
8:30 - 9:30 PM
Distinguished Speaker
Recovery from the Downturn; Technologies That Will Drive Semiconductor Business for the Coming Years
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Risto Puhakka
The semiconductor markets have been going through downturn in recent quarters. At the time of this speech, the recovery is around the corner if not already underway. Is semiconductor industry ready to exploit new technologies to drive the next cycle? What will be China's role this time? What is required from test? We will have numerous opportunities, technologies and devices that will drive the business for years to come. The presentation will explore and define these opportunities.

Risto Puhakka is President of VLSIresearch, leading the company's commercial operations and market research activities. He is an expert in Semiconductor Capital Equipment markets as well as Semiconductor Manufacturing. Risto advises managers, boards, and investors about semiconductor market trends and strategic industry statistics. He is a regularly invited speaker at conferences about various topics in semiconductor manufacturing and equipment markets.

Risto is a graduate of Helsinki University of Technology (MSc) and UC Berkeley, Haas School of Business (MBA). When Risto is not working he cherishes time with his family, runs very long distances, and is occasionally spotted flying model airplanes.

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Frontier Day
Monday March 7, 2016
8:30 - 9:00 AM
Opening Remarks
Welcoming remarks from the General Chair, Ira Feldman
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9:00 - 10:00 AM
Keynote Address
Chip Overtest
Are ICs Tested too Much?
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Dale Ohmart
Texas Instruments
We need to define test differently. It is easy to fall into the trap of considering test to mean "prove every part shipped is good", and then one step further to "test must verify all the specs of the part to ensure it's a good part". But this thinking leads to ever increasing test complexities and spiraling test costs. A better way to look at test is that the semiconductor manufacturing process builds defects and test is a sorting process to eliminate those defects from the shipped population. Test cost and test capital trends in the semiconductor industry will be examined with a discussion on how much test is affordable. What are the real-world limitations to test throughput? Are there "optimal" target values for test time and multisite count? What are the impacts of test on device yield? And how does the test process itself impact its own intrinsic yield? In addition to exploring these questions, do new requirements, such as non-electrical test and 3D assembly, also change these "answers"? Many thought provoking questions will be covered in this keynote, which will change how you think about test!

Dale Ohmart is currently a Distinguished Member of the Technical Staff at Texas Instruments, where he is focused on driving test manufacturing excellence throughout the company. He joined Texas Instruments after graduating from the University of Kansas in 1980 with his Bachelors of Science degree in Engineering Physics. He was awarded "Outstanding Senior in Physics and Astronomy" that same year and remains a proud "Kansas Jayhawk".

Throughout his career, Dale has contributed at Texas Instruments in a variety of positions from his first role as Product Engineer onwards. He was quickly promoted to Test Engineering Manager for the Microprocessors group in 1981 and has been involved in test within the organization ever since.

Dale has had many significant accomplishments during his tenure at Texas Instruments. He was instrumental in developing TI's current approach to managing test equipment productivity, he invented and holds the patent on TI's final test manufacturing process to ensure test quality, and he was the first to implement multisite testing on TI's high-pin-count digital signal processing (DSP) and micro-controller unit (MCU) products.

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10:00 - 10:30 AM
Break & Networking
Enjoy the break and networking time.
10:30 AM - 12:30 PM
Session 1
Marketplace Report &
Thing One, Thing Two, and Test Them We Do
Internet of Things
The eagerly awaited overview of the socket and contactor market along with general market trends will set the stage for what is now & next in test.
"Marketplace Report"
Ira Feldman
Feldman Engineering Corp.

The Internet of Things (IoT) is an expanding world of Smart applications for anything and everything. Smart homes, smart cars, smart businesses and more, the one thing they all have in common is that manufacturing and testing them has to be equally as smart, and that Time to Market (TTM) is more critical than ever. This session's presentations focus on solutions that address the specific business and technology challenges of IoT. Mike Frazier of Xcerra will discuss how the IoT will change back-end processing. Robert Howell from Exatron will present an overview of perfect serialization solutions for high-volume IoT. Anthony Lum of Advantest will present how to address the need for rapid TTM of IoT devices that are profiled as high mix and low- to moderate- volume. If it's not one thing it's another.
"How Internet Of Things Will Change Back End Processing"
Mike Frazier
Xcerra Corporation
Laurie Wright
Xcerra Corporation
"Serialized Programming Solutions for IoT Secure Elements"
Robert Howell
"Internet of Things Testing Challenges"
Anthony Lum
Dave Armstrong
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12:30 - 1:30 PM
Lunch is served. Enjoy the break and networking time.
1:30 PM - 3:30 PM
Session 2
Material Matters
Advanced Materials
& Manufacturing
Advanced products call for advanced materials as well as advanced manufacturing processes. In this session, we look at several aspects of each. Makota Kondo of Omron Corporation explores electroforming technology for the manufacture of probe pins with narrow pitch, which require cost-effective micro-fabrication and accuracy beyond conventional manufacturing methods. Craig Green of Carbice Nanotechnologies discusses the merits of carbon nanotube polymer composites as high-performance thermal interface materials for test and burn-in applications, where low thermal resistance is required combined with high thermo-mechanical cycles. Markku Jamsa from Aspocomp Group discusses the functional requirements and solutions for complex printed circuit boards (PCBs) for test applications. And Don Thompson of R&D Altanova presents on the challenges of PCB test fixtures and sockets for mmWave applications. The materials and processes are advanced, of course, and we think you'll find it very informative.
"Long Life Probe Pin by Electroforming Process"
Makota Kondo
Omron Corporation
Hirotada Teranishi
Omron Corporation
Takahiro Sakai
Omron Corporation
Naoyuki Kimura
Omron Corporation
"Carbon Nanotube Polymer Composites as High Performance Thermal Interface Materials for Burn in and Test Applications"
Craig Green
Carbice Nanotechnologies, Inc
Leonardo Prinzi
Georgia Institute of Technology
Baratunde Cola
Carbice Nanotechnologies, Inc.
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"Requirements and Solutions for Test PCBs"
Markku Jamsa
Aspocomp Group Oyj
"PCB Test Fixture and Socket Challenges for mmWave Applications."
Don Thompson
R&D Altanova
Jose Moreira
Advantest Europe GmbH
Giovanni Bianchi
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3:30 PM - 4:30 PM
Poster Session
Break & Networking
Poster Sessions are a great way to network through interaction with the poster presenters and other curious bystanders. At the same time enjoy the break refeshments and networking.
"WiGig Test @ 60 GHz Mission Possible"
Bert Brost
"Re-balling BGA with Gold Plated Copper Spheres, the Need and the SMT Challenges"
Emad Al-Momani
Intel Corporation
Srikanth Mothukuri
Intel Corporation
Jack Mumbo
Intel Corporation
"Thermal Test Methodology for Validating Automotive Semiconductor Packages"
Ying Feng Pang
Intel Corporation
Amy Xia
Intel Corporation
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"Insitu 256 Node Resistive Leakage Tester"
Gordon Cowan
HighRel, Inc.
Rich Zavala
HighRel, Inc.
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4:30 PM - 6:00 PM
Session 3
Stimulating Simulating
Simulations help us predict and design for expected conditions. But "information out" is only as good as "information in" and assumptions made. Mike Gedeon of Materion understands that, although finite element analysis (FEA) is a good tool, the real trick to making it work is to understand the modeling process. Although you can always get an answer from any simulation, and especially ones with pretty pictures, it may not always be a correct answer. Mike provides some insights into what to look out for. Gert Hohenwarter from GateWave Northern discusses optimizing the PCB-to-socket-to-DUT (device under test) interface, with tips on specific aspects to address for real-world conditions. Carol McCuen at R&D Altanova suggests that we characterize only the high-speed interconnect performance. This session promises to be stimulating, but perhaps we should run a simulation just to be sure.
"Optimizing the PCB-to-socket Interface"
Gert Hohenwarter
GateWave Northern, Inc.
"Characterize Only the High Speed Interconnect Performance"
Carol McCuen
R&D Altanova
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"Modelling, Materials, and Madness"
Mike Gedeon
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6:00 - 9:00 PM
The BiTS EXPO was very popular part of the BiTS program with many great exhibits to explore what is Now & Next in the test and burn-in of packaged semiconductors. There is always something new to see or someone new to meet. Not to mention excellent food, drinks, and time for attendees to network with exhibitors!
Performance Day
Tuesday March 8, 2016
8:00 - 10:00 AM
Session 4
Frequently High
High Frequency
High frequency presents unique challenges to test and, in this session, we examine a variety solutions. Hiroyuki Yamakoshi of S.E.R. Corporation will present a solution of test, inspection, and evaluation for a blind signal waveform on a printed circuit board. Don Thompson of R&D Altanova follows up on his award-winning presentation from last year's BiTS 2015, "Designing Sockets for Ludicrous Speed (80 GHz)" with new results and more. Noureen Sajid of Johnstech discusses device packaging and how it affects RF performance including device grounding and relative locations to RF signals, as well as different packages for BGA and QFN devices. Jason Mroczkowski of Xcerra provides an update from the BiTS 2015 workshop when the concept of a test cell for automotive radar testing at 81 GHZ was introduced. Jason discusses the challenges encountered and the results after a year of development and customer trials. This session provides continuity and updates from last year as well as offering new material. We have high hopes that you'll benefit from these presentations!
"High Speed BGA Sockets from a System Perspective"
Don Thompson
R&D Altanova
"A Solution of Test, Inspection and Evaluation for Blind Signal Waveform on a Board"
Tatsumi Watabe
S.E.R. Corporation
Makoto Kawamura
S.E.R. Corporation
Hiroyuki Yamakoshi
S.E.R. Corporation
"Device Packaging and How It Affects RF Performance"
Noureen Sajid
Johnstech International
Jeff Sherry
Johnstech International
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"Automotive Radar Test"
Jason Mroczkowski
Xcerra Corporation
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10:00 - 10:30 AM
Break & Networking
Enjoy the break and networking time.
10:30 AM - 12:30 PM
Session 5
West Meets East
& Cutting Edge
Advanced Technology /
New Approaches
West Meets East - We brought the "Best of BiTS" to the inagural BiTS Shanghai last year. Now, we bring the Best Presentation of BiTS Shanghai (2015) back to BiTS 2016.
"LPDDR4 Signal & Power Performance Optimization By Hardware"
Yuanjun Shi
Twinsolution Technology
Xiao Yao
HiSilicon Technologies Co

New technologies and approaches to test are always of interest and, in this session, we look at a variety of innovative new solutions. Sujata Paul of Cisco discusses reliability characterization of unpackaged (or bare) die for silicon photonics. Nelson Sorbo from Cool Clean Technologies presents an advanced high-energy CO2 spray cleaning technology for burn-in test substrate cleaning applications. Nelson compares traditional spray nozzles with newer designs and sprays. James Tong presents Texas Instruments' final test contactor qualification process and low profile contactor solution. Don't miss this session's razor sharp presentations on cutting-edge technologies and new approaches to testing challenges.
"Reliability Characterization of Unpackaged (bare) die for Silicon Photonics module"
Sujata Paul
Andrew Fong
Samir Alqadhy
Huy Nguyen
Zoe Conroy
Jag Jassal
Evans Analytical Group
Tom Elliot
Evans Analytical Group
"Advanced High Energy CO2 Spray Cleaning Technology for Burn-In Test Substrate Cleaning Applications"
Nelson Sorbo
Cool Clean Technologies
"Texas Instruments Final Test Contactor Qualification Process and Low Profile Contactor Solution"
James Tong
Texas Instruments
Hisashi Ata
Texas Instruments
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12:30 - 1:30 PM
Lunch is served. Enjoy the break and networking time.
1:30 - 3:30 PM
Session 6
Cell-ebrating Test
Test Cell - 1 of 2
Test cells are all about making sure everyone plays well together in the sandbox. In this first session, we'll hear from several companies who are addressing production solutions specifically to meet those challenges. Paul Ruo of Aries Electronics discusses testing of magnetic sensors. Brad Emberger from Advantest will present their vision assist method for common change kits. Gert Haensel of Texas Instruments will talk about magnetically shielded test cells for an integrated fluxgate sensor. Gianluca Lombardi, will present Advantest's test cell thermal solution. We believe there is much to be learned from this session and hope everyone will cell-ebrate with us.
"Vision Assist Method for Common Change Kit"
Brad Emberger
Zain Abadin
"Test Cell Thermal Solution"
Gianluca Lombardi
"Testing Magnetic Sensors"
Paul Ruo
Aries Electronics, Inc.
Larre Nelson
Kita USA
"Magnetically shielded test-cell for an integrated fluxgate sensor"
Gert Haensel
Texas Instruments
Loren Hillukka
Johnstech International Ltd.
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3:30 - 6:30 PM
The BiTS EXPO before the BiTS Social...
6:30 - 9:30 PM
BiTS Social Event
To be Annouced...
Solutions Day
Wednesday March 9, 2016
8:00 - 10:00 AM
Session 7
Very Touching
Contact Technology
This session is focused on contact technology, with several presentations on a variety of topics in this area. Tony Tiengtum of Xcerra will discuss contacting from direct current (DC) to 40 GHz and beyond. Justin Yun from TSE shares an improvement study on silicon rubber socket performance through the changes of MEMS particle shapes. James Rathburn of HSIO Technologies will speak about small form factor sockets and circuits for silicon and platform validation. Yuanjun Shi from Twin Solution will discuss prediction of contact mark for QFN packages based upon the design of the contact. We find the topic of contact technology and these presentations to be very touching, and hope you will too!
"Implementation of MEMS Particles Dramatically Improves Conventional Rubber Sockets"
Justin Yun
TSE Co., Ltd.
Dave OH
TSE Co., Ltd.
Kanghee Kim
TSE Co., Ltd.
"Contacting DC - 40GHz and Beyond - Tweaking Impedance"
Tony Tiengtum
Xcerra Corporation
Jason Mroczkowski
Xcerra Corporation
"Small Form Factor Sockets and Circuits for Silicon and Platform Validation"
James Rathburn
HSIO Technologies, LLC
"Prediction of Contact Mark for QFN package"
Yuanjun Shi
Twin Solution
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10:00 - 10:30 AM
Break & Networking
Enjoy the break and networking time.
10:30 AM - noon
Session 8
Cell-ebrating Test Too
Test Cell - 2 of 2
This is the second session addressing test cells... there was simply too much to cell-ebrate for one session alone. Jose Moreira of Advantest will discuss a silicon photonics wafer probing test cell. Jason Cullen from Plastronics explores the challenges of modeling the thermal environment within a burn-in chamber. Edwin Valderama from Intel presents on their establishing the first wafer level chip scale packaging (WLCSP) testing at tri-temp for RF and non-RF products.
"Modeling Socket Thermal Performance Inside a Burn-In Chamber"
Jason Cullen
"Established the first WLCSP Testing at Tri-temp for RF and Non-RF Products"
Edwin Valderama
Intel Technologies
Jin Sheng Tan
Intel Technologies
"A Silicon Photonics Wafer Probing Test Cell"
Jose Moreira
Hubert Werkmann
Advantest Europe GmbH
Zhan Zhang
Fabio Pizza
Advantest Europe GmbH
Yasuhiro Osuga
Tokyo Electron
Hidekazu Shibata
Tokyo Electron
Jean Luc Jeanneau
Tokyo Electron
Dario Adorni
Tokyo Electron
Paul Mooney
Tokyo Electron
Roberto Aranzulla
ST Microelectronics
Daniele Sala
ST Microelectronics
Roberto Barbon
ST Microelectronics
Giuseppe Astone
ST Microelectronics
Maurizio Rigamonti
ST Microelectronics
Massimo Galli
ST Microelectronics
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noon - 12:30 PM
Awards &
Closing Remarks
It's been three and a half days packed with learning, exploring, and sharing. Before we pack our bags and take what we've learned back to our jobs, there are a few closing remarks. We will take a moment to reflect and recognize the people, presentations, and posters that have distinguished themselves at BiTS 2016.
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Program subject to change without notice.